COURSE INTRODUCTION AND APPLICATION INFORMATION

Course Name
FPGA (Field Programmable Gate Array) Design Using HDL (Hardware Description Language)
Code
Semester
Theory
(hour/week)
Application/Lab
(hour/week)
Local Credits
ECTS
EEE 420
Fall/Spring
2
2
3
6
Prerequisites
None
Course Language
English
Course Type
Elective
Course Level
First Cycle
Mode of Delivery -
Teaching Methods and Techniques of the Course
Course Coordinator
Course Lecturer(s)
Assistant(s) -
Course Objectives This course covers the design of digital systems using VHDL and its implementation on FPGA. The unit will focus on design methodology, hardware modeling and high-level synthesis. A strong emphasis is placed on the design and implementation of working hardware implementations on FPGAs. Fundamentals of VHDL, digital design practices, and writing test benches for exercising the designs will be presented.
Learning Outcomes The students who succeeded in this course;
  • Apply techniques and methods in digital systems design,
  • Explain digital design flows in the system design,
  • Describe HDL (Verilog or VHDL) language,
  • Design digital circuits using FPGAs,
  • Analyse complex digital circuits with HDL (Verilog or VHDL).
Course Description Design Concepts, Introduction to Logic Circuits, Implementation Technology, An FPGA Primer, A VHDL Primer: The Essentials, Optimized Implementation of Logic Functions, Number Representation and Arithmetic Circuits, Combinational-Circuit Building Blocks, Design Automation and Testing for FPGAs.
Related Sustainable Development Goals

 



Course Category

 Core Courses
Major Area Courses
X
Supportive Courses
Media and Managment Skills Courses
Transferable Skill Courses

 

WEEKLY SUBJECTS AND RELATED PREPARATION STUDIES

Week Subjects Required Materials
1 Design Concepts Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.1)
2 Introduction to Logic Circuits Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.2)
3 Implementation Technology Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.3)
4 An FPGA Primer Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 2)
5 A VHDL Primer: The Essentials Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 3)
6 A VHDL Primer: The Essentials Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 3)
7 A VHDL Primer: The Essentials Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 3)
8 Optimized Implementation of Logic Functions Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.4)
9 Optimized Implementation of Logic Functions Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.4)
10 Number Representation and Arithmetic Circuits Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.5)
11 Combinational-Circuit Building Blocks Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.5)
12 Combinational-Circuit Building Blocks Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic (Chp.5)
13 Design Automation and Testing for FPGAs Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 4)
14 Design Automation and Testing for FPGAs Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson (Chp. 4)
15 Semester Review
16 Semester Review
Course Notes/Textbooks

Fundamentals of Digital Logic with VHDL Design Stephen Brown, Zvonko Vranesic
Suggested Readings/Materials

Design Recipes for FPGAs_ Using Verilog and VHDL-Peter Wilson

 

EVALUATION SYSTEM

Semester Activities Number Weigthing
Participation
15
Laboratory / Application
5
20
Field Work
Quizzes / Studio Critiques
2
10
Portfolio
Homework / Assignments
-
-
Presentation / Jury
1
10
Project
-
-
Seminar / Workshop
Oral Exam
Midterm
1
20
Final Exam
1
40
Total

Weighting of Semester Activities on the Final Grade
60
Weighting of End-of-Semester Activities on the Final Grade
40
Total

ECTS / WORKLOAD TABLE

Semester Activities Number Duration (Hours) Workload
Course Hours
(Including exam week: 16 x total hours)
16
2
32
Laboratory / Application Hours
(Including exam week: 16 x total hours)
16
2
Study Hours Out of Class
16
5
80
Field Work
Quizzes / Studio Critiques
2
2
Portfolio
Homework / Assignments
-
-
Presentation / Jury
1
10
Project
-
-
Seminar / Workshop
Oral Exam
Midterms
1
10
Final Exams
1
10
    Total
178

 

COURSE LEARNING OUTCOMES AND PROGRAM QUALIFICATIONS RELATIONSHIP

#
 Program Competencies/Outcomes
* Contribution Level
1
2
3
4
5
1

To have adequate knowledge in Mathematics, Science and Electrical and Electronics Engineering; to be able to use theoretical and applied information in these areas on complex engineering problems.

 X
2

To be able to identify, define, formulate, and solve complex Electrical and Electronics Engineering problems; to be able to select and apply proper analysis and modeling methods for this purpose.

 X
3

To be able to design a complex system, process, device or product under realistic constraints and conditions, in such a way as to meet the requirements; to be able to apply modern design methods for this purpose.

 X
4

To be able to devise, select, and use modern techniques and tools needed for analysis and solution of complex problems in Electrical and Electronics Engineering applications; uses computer and information technologies effectively.

 X
5

To be able to design and conduct experiments, gather data, analyze and interpret results for investigating complex engineering problems or Electrical and Electronics Engineering research topics.

 X
6

To be able to work efficiently in Electrical and Electronics Engineering disciplinary and multi-disciplinary teams; to be able to work individually.

 X
7

To be able to communicate effectively in Turkish, both orally and in writing; to be able to author and comprehend written reports, to be able to prepare design and implementation reports, to present effectively, to be able to give and receive clear and comprehensible instructions.
8

To have knowledge about global and social impact of engineering practices on health, environment, and safety; to have knowledge about contemporary issues as they pertain to Electrical and Electronics Engineering; to be aware of the legal ramifications of Electrical and Electronics Engineering solutions.

 X
9

To be aware of ethical behavior, professional and ethical responsibility; to have knowledge about standards utilized in engineering applications

 X
10

To have knowledge about industrial practices such as project management, risk management, and change management; to have awareness of entrepreneurship and innovation; to have knowledge about sustainable development.

 X
11

To be able to collect data in the area of Electrical and Electronics Engineering, and to be able to communicate with colleagues in a foreign language. ("European Language Portfolio Global Scale", Level B1)

 X
12

To be able to speak a second foreign language at a medium level of fluency efficiently.
13

To recognize the need for lifelong learning; to be able to access information, to be able to stay current with developments in science and technology; to be able to relate the knowledge accumulated throughout the human history to Electrical and Electronics Engineering.

 X

*1 Lowest, 2 Low, 3 Average, 4 High, 5 Highest